Metal Oxide Semiconductor (MOS) devices are widely used in integrated circuit devices. Such MOS devices may include memory devices which are comprised of an array of memory cells. Each memory cell is comprised of a capacitor, on which the charge stored represents the logical state of the memory cell. Conductors, referred to as word lines, serve as gate electrodes of multiple access transistors which provide access to the memory cells. In a DRAM (Dynamic Random Access Memory), a word line gate electrode typically is fabricated on a p-type silicon substrate coated with a thin film of silicon dioxide, known as the gate oxide. Word lines conventionally are formed on the gate oxide layer as a two-layer stack, typically including polysilicon and a conductor material such as tungsten silicide or titanium silicide (commonly referred to as a polycide word line). Further, polycide structures are also used for local interconnects in MOS devices. For example, such polycide structures may be used for the local interconnection of gates and drains in a SRAM (Static Random Access Memory).
Minimizing resistivity throughout the word line or other interconnect structures is of importance to meet the need of reducing time constants and allowing access of memory cells in as short a time period as possible. As memory density increases, feature sizes, including line sizes, decrease. For example, when the feature size of a conductor, such as a local interconnect or a word line, is reduced in a high density memory, the resistance of the conductor increases. Thin tungsten silicide and titanium silicide are larger grain materials that contribute to a very rough silicide/silicon interface. As such, it reduces the effective ohmic contact area. Therefore, it is desirable to utilize conductors whose resistivity will not significantly increase for the same feature dimensions.
Further, in the fabrication of semiconductor devices, it is desirable to find conductors which are suitable for use at high temperatures (e.g., up to about 1100.degree. C.) during processing steps. Particularly desirable are materials which have low bulk resistivities and good oxidation resistance at high temperatures. However, such materials can be difficult to find, and, once found, difficult to form by conventional methods. Further, other problems may occur with such materials, such as, for example, diffusion of atoms from one layer to another, particularly at high processing temperatures. Such diffusion is particularly undesirable if the properties of one layer are changed because of diffusing atoms.
It has been reported in the article by Choi et al., "Electrical Characteristics of TiB.sub.2 for ULSI Applications," IEEE Transactions on Electron Devices, Vol. 39, No. 10 (October 1992) that titanium diboride may be used as a diffusion barrier in metallization applications.
In view of the above, there is a need for low resistivity materials for use in gate electrode and interconnect applications. The present invention provides gate electrode structures and interconnect structures which overcome the disadvantages described above, along with other problems as will be apparent from the description below.